Pampium I - Projeto e implementação de um microcontrolador de 16 bits em arquitetura RISC

Abstract

This work presents the development in SystemVerilog, simulation and logic synthesis of a 16-bit microcontroller with RISC architecture called PAMPIUM I. The topics for the development of architecture that are detailed in this work are: the basic structure; de_nition of instructions to be implemented; specification of the size of the instruction word and standard formats; specification of the instructions to be implemented; creation of the instruction data path within the basic architecture proposed; specification of functional blocks that meet the requirements of the data path; implementation in hardware description language of the functional test validation for each block that compose the architecture of the PAMPIUM I; implementation of the final data path and validation of test instructions in Quartus II tool; test applicaton for communication with an ISP1362 chip; and test application for controlling an electronic security door. The PAMPIUM I is a 16-bit microcontroller RISC architecture, with 32 implemented instructions, two banks of registers each with 32 registers, 64𝑘𝑊𝑜𝑟𝑑𝑠 of 16-bit of data memory, 8𝑘𝑊𝑜𝑟𝑑𝑠 of 24-bit of program memory and two in/out 16-bit ports. The FPGA synthesis results in using 3336 logic elements and 1536 registers. The FPGA synthesis resulted in using 3336 logic elements and 1536 registers. The data memory and program memory are mapped to the FPGA resulting a total of 88 𝑘𝐵𝑦𝑡𝑒𝑠 of used memory. The maximum clock frequency is 25.4𝑀𝐻𝑧 ,and the critical path is given by operations involving the ALU. The microcontroller was used to control the ISP1362 and to the design of an electronic security door. Validation tests demonstrated the correct operation of input and output interfaces to communicate with ISP1362, well as the correct functioning of PAMPIUM I like microcontroller to control a security door electronics.