Análise comparativa das técnicas de implementação de arquiteturas da função sigmoide

Abstract

Given the growing use of artificial intelligence in the form of artificial neural networks, activation functions are important elements for the accuracy and efficiency of such intelligent systems. In this work, the implementation of the sigmoid activation function by hardware architectures is investigated, in order to verify the performance and accuracy of three techniques for implementing digital architectures: Piecewise Linear Aproximation of Non linear function, Piecewise Second order Aproximation of Non linear function and Taylor polynomials based approximation. The hardware implementation of the sigmoid activation function is important because it can influence the performance, area and power consumption of a neural network accelerator, especially when many units are working in parallel. The digital architectures were implemented in SystemVerilog hardware description language for Field-programmable Gate Array, then the performance of the techniques against each other was verified, with respect to three main variables of interest: frequency, average error and consumption of logic elements. A comparison with related solutions from the literature is also presented.