Asipampium: uma ferramenta de desenvolvimento automático de processadores de aplicação específica

Abstract

In the last years there has been an exponential increase in the development of embedded systems, which are used in the most diverse equipment such as home appliances and portable electronics. Embedded systems are made up of processors of specific or general purpose. Specific processors are developed for each system, with restrictions on area, energy consumption and processing time. These restrictions are depend on the application and the features. Among several types of design methodologies for the development of processors for these equipments, stands out the development methodology for Application Specific Integrated Processors (ASIPs). ASIPs are optimally developed for each application, with a set of instructions, types of memory, quantity and custom access forms. However, the optimization of the hardware implies a lot of effort for the development of the processor. It is also necessary to develop a set of tools, such as compilers and simulators for ASIP. In that sense an automatic ASIP development platform is needed that analyzes the program, the application restrictions, and also provides support for simulation and compilation. This work has as main objective to elaborate a tool for the automatic development of specific application processors called ASIPAMPIUM. This tool seeks to make the development of an ASIP easy and fast, with a good relation between area, power consumption and processing speed. For this, a reconfigurable processor architecture, called PAMPIUM, was proposed, which is defined as a RISC architecture with 80 instructions, using register operations only. This architecture is used as the basis for ASIP, since it has the necessary flexibility to adapt to the characteristics of the most diverse applications. The use of a base architecture allows the user to develop ASIPs for the most varied applications using the same development platform. The processor generated by ASIPAMPIUM is available in hardware description language, so that it can be synthesized for the manufacture of integrated circuits or for FPGA implementation. Three basic versions of PAMPIUM are used: monocycle, pipeline and superscalar. In this way the generated processor takes into account the main compiler and simulator statistics. For validation, the ASIPAMPIUM tool was used in the development of an FFT and compared its characteristics with other works, showing a good equivalence in the results. Also has been developed control system for a retrodirective antennas array. This system has been tested and validated in FPGA. In addition, a version of PAMPIUM in silicon, called PAMPIUM IC, was developed, which was prototyped in TSMC 0 ,18µ technology, tested and validated electrically. These applications demonstrate the correct functioning of the proposed methodology, generating high performance hardware with a short development time.